VirtRegMap.h 7.1 KB

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  1. //===- llvm/CodeGen/VirtRegMap.h - Virtual Register Map ---------*- C++ -*-===//
  2. //
  3. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
  4. // See https://llvm.org/LICENSE.txt for license information.
  5. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
  6. //
  7. //===----------------------------------------------------------------------===//
  8. //
  9. // This file implements a virtual register map. This maps virtual registers to
  10. // physical registers and virtual registers to stack slots. It is created and
  11. // updated by a register allocator and then used by a machine code rewriter that
  12. // adds spill code and rewrites virtual into physical register references.
  13. //
  14. //===----------------------------------------------------------------------===//
  15. #ifndef LLVM_CODEGEN_VIRTREGMAP_H
  16. #define LLVM_CODEGEN_VIRTREGMAP_H
  17. #include "llvm/ADT/IndexedMap.h"
  18. #include "llvm/CodeGen/MachineFunctionPass.h"
  19. #include "llvm/CodeGen/TargetRegisterInfo.h"
  20. #include "llvm/CodeGen/TileShapeInfo.h"
  21. #include "llvm/Pass.h"
  22. #include <cassert>
  23. namespace llvm {
  24. class MachineFunction;
  25. class MachineRegisterInfo;
  26. class raw_ostream;
  27. class TargetInstrInfo;
  28. class VirtRegMap : public MachineFunctionPass {
  29. public:
  30. enum {
  31. NO_PHYS_REG = 0,
  32. NO_STACK_SLOT = (1L << 30)-1,
  33. MAX_STACK_SLOT = (1L << 18)-1
  34. };
  35. private:
  36. MachineRegisterInfo *MRI;
  37. const TargetInstrInfo *TII;
  38. const TargetRegisterInfo *TRI;
  39. MachineFunction *MF;
  40. /// Virt2PhysMap - This is a virtual to physical register
  41. /// mapping. Each virtual register is required to have an entry in
  42. /// it; even spilled virtual registers (the register mapped to a
  43. /// spilled register is the temporary used to load it from the
  44. /// stack).
  45. IndexedMap<Register, VirtReg2IndexFunctor> Virt2PhysMap;
  46. /// Virt2StackSlotMap - This is virtual register to stack slot
  47. /// mapping. Each spilled virtual register has an entry in it
  48. /// which corresponds to the stack slot this register is spilled
  49. /// at.
  50. IndexedMap<int, VirtReg2IndexFunctor> Virt2StackSlotMap;
  51. /// Virt2SplitMap - This is virtual register to splitted virtual register
  52. /// mapping.
  53. IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2SplitMap;
  54. /// Virt2ShapeMap - For X86 AMX register whose register is bound shape
  55. /// information.
  56. DenseMap<unsigned, ShapeT> Virt2ShapeMap;
  57. /// createSpillSlot - Allocate a spill slot for RC from MFI.
  58. unsigned createSpillSlot(const TargetRegisterClass *RC);
  59. public:
  60. static char ID;
  61. VirtRegMap()
  62. : MachineFunctionPass(ID), MRI(nullptr), TII(nullptr), TRI(nullptr),
  63. MF(nullptr), Virt2PhysMap(NO_PHYS_REG),
  64. Virt2StackSlotMap(NO_STACK_SLOT), Virt2SplitMap(0) {}
  65. VirtRegMap(const VirtRegMap &) = delete;
  66. VirtRegMap &operator=(const VirtRegMap &) = delete;
  67. bool runOnMachineFunction(MachineFunction &MF) override;
  68. void getAnalysisUsage(AnalysisUsage &AU) const override {
  69. AU.setPreservesAll();
  70. MachineFunctionPass::getAnalysisUsage(AU);
  71. }
  72. MachineFunction &getMachineFunction() const {
  73. assert(MF && "getMachineFunction called before runOnMachineFunction");
  74. return *MF;
  75. }
  76. MachineRegisterInfo &getRegInfo() const { return *MRI; }
  77. const TargetRegisterInfo &getTargetRegInfo() const { return *TRI; }
  78. void grow();
  79. /// returns true if the specified virtual register is
  80. /// mapped to a physical register
  81. bool hasPhys(Register virtReg) const {
  82. return getPhys(virtReg) != NO_PHYS_REG;
  83. }
  84. /// returns the physical register mapped to the specified
  85. /// virtual register
  86. MCRegister getPhys(Register virtReg) const {
  87. assert(virtReg.isVirtual());
  88. return MCRegister::from(Virt2PhysMap[virtReg.id()]);
  89. }
  90. /// creates a mapping for the specified virtual register to
  91. /// the specified physical register
  92. void assignVirt2Phys(Register virtReg, MCPhysReg physReg);
  93. bool isShapeMapEmpty() const { return Virt2ShapeMap.empty(); }
  94. bool hasShape(Register virtReg) const {
  95. return getShape(virtReg).isValid();
  96. }
  97. ShapeT getShape(Register virtReg) const {
  98. assert(virtReg.isVirtual());
  99. return Virt2ShapeMap.lookup(virtReg);
  100. }
  101. void assignVirt2Shape(Register virtReg, ShapeT shape) {
  102. Virt2ShapeMap[virtReg.id()] = shape;
  103. }
  104. /// clears the specified virtual register's, physical
  105. /// register mapping
  106. void clearVirt(Register virtReg) {
  107. assert(virtReg.isVirtual());
  108. assert(Virt2PhysMap[virtReg.id()] != NO_PHYS_REG &&
  109. "attempt to clear a not assigned virtual register");
  110. Virt2PhysMap[virtReg.id()] = NO_PHYS_REG;
  111. }
  112. /// clears all virtual to physical register mappings
  113. void clearAllVirt() {
  114. Virt2PhysMap.clear();
  115. grow();
  116. }
  117. /// returns true if VirtReg is assigned to its preferred physreg.
  118. bool hasPreferredPhys(Register VirtReg) const;
  119. /// returns true if VirtReg has a known preferred register.
  120. /// This returns false if VirtReg has a preference that is a virtual
  121. /// register that hasn't been assigned yet.
  122. bool hasKnownPreference(Register VirtReg) const;
  123. /// records virtReg is a split live interval from SReg.
  124. void setIsSplitFromReg(Register virtReg, Register SReg) {
  125. Virt2SplitMap[virtReg.id()] = SReg;
  126. if (hasShape(SReg)) {
  127. Virt2ShapeMap[virtReg.id()] = getShape(SReg);
  128. }
  129. }
  130. /// returns the live interval virtReg is split from.
  131. Register getPreSplitReg(Register virtReg) const {
  132. return Virt2SplitMap[virtReg.id()];
  133. }
  134. /// getOriginal - Return the original virtual register that VirtReg descends
  135. /// from through splitting.
  136. /// A register that was not created by splitting is its own original.
  137. /// This operation is idempotent.
  138. Register getOriginal(Register VirtReg) const {
  139. Register Orig = getPreSplitReg(VirtReg);
  140. return Orig ? Orig : VirtReg;
  141. }
  142. /// returns true if the specified virtual register is not
  143. /// mapped to a stack slot or rematerialized.
  144. bool isAssignedReg(Register virtReg) const {
  145. if (getStackSlot(virtReg) == NO_STACK_SLOT)
  146. return true;
  147. // Split register can be assigned a physical register as well as a
  148. // stack slot or remat id.
  149. return (Virt2SplitMap[virtReg.id()] &&
  150. Virt2PhysMap[virtReg.id()] != NO_PHYS_REG);
  151. }
  152. /// returns the stack slot mapped to the specified virtual
  153. /// register
  154. int getStackSlot(Register virtReg) const {
  155. assert(virtReg.isVirtual());
  156. return Virt2StackSlotMap[virtReg.id()];
  157. }
  158. /// create a mapping for the specifed virtual register to
  159. /// the next available stack slot
  160. int assignVirt2StackSlot(Register virtReg);
  161. /// create a mapping for the specified virtual register to
  162. /// the specified stack slot
  163. void assignVirt2StackSlot(Register virtReg, int SS);
  164. void print(raw_ostream &OS, const Module* M = nullptr) const override;
  165. void dump() const;
  166. };
  167. inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) {
  168. VRM.print(OS);
  169. return OS;
  170. }
  171. } // end llvm namespace
  172. #endif // LLVM_CODEGEN_VIRTREGMAP_H